This invention relates to a system for phase locking a low frequency signal to a synthesized higher frequency signal of a type which may be utilized in the scanning drive of a facsimile system.
In some facsimile transceivers such as the QWIP Systems 1200, it is desirable to synchronize the scanning of the facsimile transmitter with the scanning of the facsimile receiver so as to assure alignment of the margin on the copy or facsimile which corresponds with the margin on the original transmitted document. In order to achieve such synchronism, the transmitter and receiver are initially driven at substantially different scanning speeds or frequencies until a first degree of synchronism is achieved. Subsequently, the facsimile transmitter and receiver are driven at closer but still different scanning speeds and frequencies until such time as a more substantial degree of synchronism is achieved. Once the more substantial degree of synchronism is achieved, the same scanning speed or frequencies are utilized at both the transmitter and the receiver.
The foregoing synchronization technique is described in copending application Ser. No. 676,369 filed Apr. 12, 1976, now U.S. Pat. No. 4,044,383. As disclosed therein, various drive frequencies are generated for synchronization purposes and applied to a synchronous scanning motor. In copending application Ser. No. 622,215, now U.S. Pat. No. 4,092,576 filed Oct. 14, 1975 and application Ser. No. 622,214 filed Oct. 14, 1975, now U.S. Pat. No. 4,146,908, DC motors are utilized with speed control provided by a phase locked loop which locks the frequency of a tachometer feedback signal to a reference signal which may be generated by a crystal oscillator before synchronization is achieved and the AC power line signal after synchronization is achieved.
The AC line reference signal is generated by a phase locked loop comprising a voltage controlled oscillator, a frequency divider and a phase comparator. The phase comparator compares the phase and frequency of the VCO output as divided by the frequency divider with an AC line reference signal. The AC line reference signal has a frequency which is equal to the frequency of the line voltage multiplied by the divisor of the frequency divider.
A phase locked loop is generally characterized by a substantial number of components at some cost. These components and costs are attributable to the use of a phase comparator, a voltage controlled oscillator and a filter.